TY - GEN
T1 - System-level exhaustive link simulation needed for PCB Co-design
AU - Buchs, Kevin J.
AU - Degerstrom, Michael J.
AU - McCoy, Bart O.
AU - Daniel, Erik S.
AU - Gilbert, Barry K.
PY - 2011
Y1 - 2011
N2 - Traditionally, the large number of high-speed serial links in large, massively-parallel, highly-interconnected computer systems have been analyzed in terms of signal integrity by selecting a small subset of representative links. Co-design decisions on PCB geometries and connectors are often made from this subset of the links. Is that approach adequate? We show the benefit of simulation of all the links in a system. In addition, we demonstrate how exhaustive simulations are possible through a process of automation.
AB - Traditionally, the large number of high-speed serial links in large, massively-parallel, highly-interconnected computer systems have been analyzed in terms of signal integrity by selecting a small subset of representative links. Co-design decisions on PCB geometries and connectors are often made from this subset of the links. Is that approach adequate? We show the benefit of simulation of all the links in a system. In addition, we demonstrate how exhaustive simulations are possible through a process of automation.
UR - http://www.scopus.com/inward/record.url?scp=79960389598&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=79960389598&partnerID=8YFLogxK
U2 - 10.1109/ECTC.2011.5898510
DO - 10.1109/ECTC.2011.5898510
M3 - Conference contribution
AN - SCOPUS:79960389598
SN - 9781612844978
T3 - Proceedings - Electronic Components and Technology Conference
SP - 173
EP - 182
BT - 2011 IEEE 61st Electronic Components and Technology Conference, ECTC 2011
T2 - 2011 61st Electronic Components and Technology Conference, ECTC 2011
Y2 - 31 May 2011 through 3 June 2011
ER -