Ka-band (35 GHz) low-noise 180 nm SOI CMOS amplifier

P. J. Riemer, J. F. Prairie, B. R. Buhrow, C. L. Chen, C. L. Keast, P. W. Wyatt, B. A. Randall, B. K. Gilbert, E. S. Daniel

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Scopus citations


We present the development of a coplanar waveguide (CPW) Ka-band (35 GHz) low-noise amplifier (LNA) designed in MIT-Lincoln Laboratory (MIT-LL) 180 nm fully depleted silicon-on-insulator (FDSOI) CMOS technology fabricated on a "float zone" (2000 ohm-cm) substrate. The LNA exhibits a noise figure of 6.5 dB and an associated gain of 6.7 dB at 37 GHz while consuming 27.5 mW of DC power. When biased for maxium gain the LNA exhibits 7.3 dB gain at 35.8 GHz.

Original languageEnglish (US)
Title of host publication2006 IEEE international SOI Conference Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
Number of pages2
ISBN (Print)1424402905, 9781424402908
StatePublished - Jan 1 2006
Event2006 IEEE International Silicon on Insulator Conference, SOI - Niagara Falls, NY, United States
Duration: Oct 2 2006Oct 5 2006

Publication series

NameProceedings - IEEE International SOI Conference
ISSN (Print)1078-621X


Other2006 IEEE International Silicon on Insulator Conference, SOI
Country/TerritoryUnited States
CityNiagara Falls, NY

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering


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