EXPLOITATION OF PARALLELISM AND ULTRASPEED INTEGRATED CIRCUITS IN THE NEXT GENERATION OF DISTRIBUTED SUPER SIGNAL PROCESSORS.

B. K. Gilbert; B. A. Navsed; S. M. Hartley; W. K. VanNurden; R. Deming

EXPLOITATION OF PARALLELISM AND ULTRASPEED INTEGRATED CIRCUITS IN THE NEXT GENERATION OF DISTRIBUTED SUPER SIGNAL PROCESSORS.

B. K. Gilbert, B. A. Navsed, S. M. Hartley, W. K. VanNurden, R. Deming

Physiology & Biomedical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Original language	English (US)
Title of host publication	IEEE Computer Society Workshop on Computer Architecture for Pattern Analysis and Image Database Ma
Publisher	IEEE
Pages	87-92
Number of pages	6
ISBN (Print)	0818604980
State	Published - Dec 1 1983

Publication series

Name	IEEE Computer Society Workshop on Computer Architecture for Pattern Analysis and Image Database Ma

ASJC Scopus subject areas

Engineering(all)

Cite this

Gilbert, B. K., Navsed, B. A., Hartley, S. M., VanNurden, W. K., & Deming, R. (1983). EXPLOITATION OF PARALLELISM AND ULTRASPEED INTEGRATED CIRCUITS IN THE NEXT GENERATION OF DISTRIBUTED SUPER SIGNAL PROCESSORS. In IEEE Computer Society Workshop on Computer Architecture for Pattern Analysis and Image Database Ma (pp. 87-92). (IEEE Computer Society Workshop on Computer Architecture for Pattern Analysis and Image Database Ma). IEEE.

EXPLOITATION OF PARALLELISM AND ULTRASPEED INTEGRATED CIRCUITS IN THE NEXT GENERATION OF DISTRIBUTED SUPER SIGNAL PROCESSORS. / Gilbert, B. K.; Navsed, B. A.; Hartley, S. M. et al.
IEEE Computer Society Workshop on Computer Architecture for Pattern Analysis and Image Database Ma. IEEE, 1983. p. 87-92 (IEEE Computer Society Workshop on Computer Architecture for Pattern Analysis and Image Database Ma).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Gilbert, BK, Navsed, BA, Hartley, SM, VanNurden, WK & Deming, R 1983, EXPLOITATION OF PARALLELISM AND ULTRASPEED INTEGRATED CIRCUITS IN THE NEXT GENERATION OF DISTRIBUTED SUPER SIGNAL PROCESSORS. in IEEE Computer Society Workshop on Computer Architecture for Pattern Analysis and Image Database Ma. IEEE Computer Society Workshop on Computer Architecture for Pattern Analysis and Image Database Ma, IEEE, pp. 87-92.

Gilbert BK, Navsed BA, Hartley SM, VanNurden WK, Deming R. EXPLOITATION OF PARALLELISM AND ULTRASPEED INTEGRATED CIRCUITS IN THE NEXT GENERATION OF DISTRIBUTED SUPER SIGNAL PROCESSORS. In IEEE Computer Society Workshop on Computer Architecture for Pattern Analysis and Image Database Ma. IEEE. 1983. p. 87-92. (IEEE Computer Society Workshop on Computer Architecture for Pattern Analysis and Image Database Ma).

Gilbert, B. K. ; Navsed, B. A. ; Hartley, S. M. et al. / EXPLOITATION OF PARALLELISM AND ULTRASPEED INTEGRATED CIRCUITS IN THE NEXT GENERATION OF DISTRIBUTED SUPER SIGNAL PROCESSORS. IEEE Computer Society Workshop on Computer Architecture for Pattern Analysis and Image Database Ma. IEEE, 1983. pp. 87-92 (IEEE Computer Society Workshop on Computer Architecture for Pattern Analysis and Image Database Ma).

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EXPLOITATION OF PARALLELISM AND ULTRASPEED INTEGRATED CIRCUITS IN THE NEXT GENERATION OF DISTRIBUTED SUPER SIGNAL PROCESSORS.

Publication series

ASJC Scopus subject areas

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