Abstract
We propose a static memory architecture in which each bit consists of a single two-terminal device that is bistable in current. Current-mode operation of the memory array removes the need for cell-isolation transistors, thus, allowing huge increases in density over inverter-based SRAM and capacitor-based DRAM. Low power consumption and fast read/write speeds are ensured by taking advantage of the exponential nature of the memory's current-voltage characteristic.
Original language | English (US) |
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Pages (from-to) | 669-672 |
Number of pages | 4 |
Journal | IEEE Journal of Solid-State Circuits |
Volume | 33 |
Issue number | 4 |
DOIs | |
State | Published - Apr 1 1998 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering